Hardware platform competences
Barco Silex has state-of-the-art expertise related to FPGA, ASIC and PCB hardware platforms. With this extended experience, we are able to provide you a complete solution for any possible hardware system.
The knowledge of these platforms, combined with our application competences that are listed below offers our customers a high performing, cost efficient and time-to-market solution.
| Name | Description |
|---|---|
| Cryptography and Security | RSA & Elliptic Curves (GF(p) & GF(2m)), AES, DES, 3-DES, HASHING, Bus encryption & memory authentication, Random Generators |
| Image and Video Coding | JPEG, JPEG2000, MPEG-2, MPEG-4, MP3, DVD, LCD controllers On Screen Displays |
| Image and Video Processing | [Fractional] Image Rotation, Interlaced / non-interlaced conversions, Wavelet Transformations, Scan Rate Conversions Image Scaling Units, Transpose Imaging, Image Dithering, Mathematical morphology, Image Noise Reduction, Image Filtering, SDI, HDSDI, DVI, HDMI |
| Transport Streaming | MPEG-2 part 1, Systems (ISO/IEC-13818-1) |
| Transport Streaming over IP | MPEG-2 Transport Streams over IP (SMPTE-2002-2) + RTP/UDP/IP protocols |
| Communications and busses | PCI, PCIe, PCI-X, IrDa, SDLC, UART, I2C, USB 2.0, Ethernet MAC, PCMCIA, SCC, Viterbi, Reed-Solomon |
| High Speed Communications | SCSI U2W 80MB/s and 160 MB/s, Optical GigaLink, Digital X-Tal / PLL |
| High Speed Serial Interfaces | IDE Bus interfaces, HW drivers for HardDisk / ZIP / DVD / CompactFlash CD-ROM / ZIP, SERDES( Altera GPX tranceivers, Xilinx RocketIO) |
| Peripheral Modules | Timers, Interrupt controllers, RTC, GPIO, DMA, Watchdog, FIFO, SPI |
| Memory Controllers | SDR/DDR/DDR2 SDRAM, NOR-Flash, NAND-Flash (Parallel, SPI, Quad-SPI), ECC (Hamming, R-S), AXI DDR/DDR2, DDR3, QDR, Compact Flash |
| Embedded Processors & DSP | ARM7, ARM9, XSCALE, Nios, MicroBlaze, 8032, Z80, AVR, Cronus, NXP Nexperia, PowerPC, Texas Instuments DaVinci and Omap |
| Generators | Numerous Image Testbenches, Complex Signal Generators, Clock and Data Recovery |
| Analog | Discrete High-Speed DAC / ADC, PLL, Power Supplies |
| DO-254 | DO-254 defined FPGA and ASIC design and verification flow. Templates for HRD, CDD, DDD, HVCP, HTM, HVR, HCI, HECI. Templates for all review documents and plans (PHAC, HVVP, HDP, HCMP, HPAP) |
| ARM | AHB & AXI AMBA protocols, ARM PrimeCells, AHB-APB Interface, Emulation board |
| Complex High-Speed Design | Signal Integrity design rules for PCB design, High-performance architectures (ASIC & FPGA) |
